with the rapid progress in deep sub-micron technology, most of the routing problems raised in physical design of vlsi chips, whatever they are not-np hard, np complete or np difficult, are demanding more efficient routing algorithms 在目前ic的工艺条件下,很多vlsi的物理设计中的布线问题(无论是非np问题、np完全问题和np困难问题),由于问题规模的急剧增大,都迫切需要更有效的优化方法来解决。
the paper can be divided into two partitions : in the first part the p / g network verification problem in the vlsi chip scope is probed . an algorithm is proposed which partition the global network into several sub networks . then it performs sub network compressing equivalent transform and calculates the final size-reduced linear equations 本论文包括两个部分,第一部分探讨了vlsi芯片pg网验证问题,提出基于网络划分、子网等效压缩变换的大规模线性方程组求解方法;第二部分探讨了一个晶体管级宏单元自动版图布线系统的有关理论问题,并实现了一个实用的处理宏单元版图的自动布线系统。